1. Field of the Invention
The present invention relates to a liquid crystal display device and a method for fabricating the same. More particularly, the present invention relates to a liquid crystal display device, which can prevent signal distortion by reducing the interference effect between an active layer and a common electrode, as well as a method for fabricating the same.
2. Description of the Related Art
A display device, especially a flat panel display, such as a liquid crystal display (LCD) device, is driven by an active device, such as a thin film transistor (TFT), at each pixel.
This kind of driving method for a display device is usually called an active matrix driving method. In such an active matrix method, the active device is arranged at each pixel in a matrix form to drive the corresponding pixel.
FIG. 1 is a view showing an active matrix type liquid crystal display device. The LCD device is a TFT LCD device in which a thin film transistor is used as an active device.
As shown therein, each pixel of the TFT LCD device where N×M pixels are arranged horizontally and vertically includes a TFT (not shown) formed at the crossing of a gate line 13 to which a scan signal is applied from an external driving circuit and a data line 19 to which an image signal is applied.
The TFT (not shown) includes a gate electrode 13a connected to the gate line 13, an active layer 17 formed on the gate electrode 13a and activated as a scan signal is applied to the gate electrode 13a, and source/drain electrodes 19a and 19b formed on the active layer 17.
A pixel electrode 29 is formed at a display region of the pixel. The pixel electrode 29 is connected to the drain electrode 19b and operates the liquid crystal (not shown) by receiving an image signal through the drain electrode 19b as the active layer 17 is activated.
Such an LCD device is usually manufactured by complicated processes including a photolithography process using a mask. A conventional method for fabricating an LCD device using a four-mask process will be described with reference to FIGS. 2A to 2I.
FIGS. 2A to 2I are sectional views showing a process for fabricating a liquid crystal display device according to the related art, taken along lines IIA-IIA and IIB-IIB of FIG. 1.
Referring to FIG. 2A, a metal layer (not shown) is formed on a first substrate 11 and a first photoresist film (not shown) is coated on the deposited metal layer. Then, a photolithography process including exposure and development processes using a first mask (not shown) is carried out to remove the first photoresist film and form a first photoresist pattern (not shown). Subsequently, the metal layer is selectively removed using the first photoresist pattern as a mask to form a gate line (not shown) and a gate electrode 13a extending from the gate line.
Next, referring to FIG. 2B, after removing the first photoresist pattern, a gate insulating layer 15, an active layer 17, an ohmic contact layer (not shown), and a conductive layer 19 are sequentially formed on the entire surface of the first substrate 11 where the gate electrode 13a is formed.
Subsequently, a second photoresist film 21 is coated on the conductive layer 19, and then the second photoresist pattern 21 is selectively removed through another photolithography process including diffractive exposure and development processes using a second mask 23, which is a diffraction mask, thereby forming second photoresist patterns 21a and 21b. At this time, the second mask 23 serving as the diffraction mask includes a light shielding portion 23a, a semi-transmitting portion 23b, and a transmitting portion 23c. The light shielding portion 23a is disposed at a top portion of the second photoresist film 21 corresponding to the source/drain regions, the semi-transmitting portion 23b is disposed at a position above the second photoresist film 21 corresponding to the channel region, and the transmitting portion 23c is disposed at a top portion of the second photoresist film 21 corresponding to the regions except the above regions.
Therefore, the portion of the second photoresist pattern 21a, patterned by a development process by ultraviolet rays irradiated through the semi-transmitting portion 23b of the second mask 23 serving as the diffraction mask has a photoresist film thickness smaller than the portion of the second photoresist pattern 21b disposed on the upper end of the channel region of the active layer 17. Therefore, although part of the ultraviolet rays is irradiated to the second photoresist film 21 through the semi-transmitting portion 23b, it is not irradiated through the light shielding portion 23a. Accordingly, the portion of the second photoresist film 21b below the light shielding portion 23a remains as it is, and the second photoresist film 21a below the semi-transmitting portion 21b is only partially developed and remains. Of the second photoresist film 21, the part exposed through the transmitting portion 23c is entirely removed.
Next, referring to FIG. 2C, the conductive layer 19, the ohmic contact layer (not shown), and the active layer 17 are sequentially etched by using the second photoresist patterns 21a and 21b as an etch mask to form active patterns 17a and 17b. 
Subsequently, referring to FIGS. 2C and 2D, the portion of the conductive layer 19 disposed on the channel portion is exposed by ashing the second photoresist patterns 21a and 21b. In the ashing process, the second photoresist pattern 21a at the relatively thin region, that is, the channel region, is completely removed, to thus expose the portion of the conductive layer 19 thereunder. In addition, the a partial portion of the other second photoresist pattern 21b is removed to remain a predetermined thickness. That is, the ashing process is a process to oxidize and remove a photoresist film, which is an organic material. By this process, part of the second photoresist patterns is removed by oxidation, to thus remove the entire second photoresist pattern 21a and a partial portion of the second photoresist pattern 21b to a predetermined thickness.
Next, referring to FIG. 2E, the conductive layer 19 at the channel region and the ohmic contact layer are removed by using the ashed second photoresist pattern 21b as an etch mask, to form a source electrode 19a and a drain electrode 19b. At this stage, since the ashed second photoresist pattern 21b also exposes the peripheral regions of the active patterns 17a and 17b, the ohmic contact layer (not shown) and the conductive layer 19 formed on the peripheries of the active patterns 17a and 17b are removed. As a result, the active patterns 17a and 17b are protruded as compared to the source and drain electrodes 19a and 19b, and the data line 19. Therefore, a gap with a width of “D1” is formed between the active pattern 17b and a common electrode 13b. 
Subsequently, referring to FIG. 2F, the ashed second photoresist pattern 21b is removed, and then a passivation layer 23 is formed on the first substrate 11 including the source and drain electrodes 19a and 19b, and a third photoresist film 25 is coated thereon.
Next, referring to FIG. 2G, the third photoresist film 25 is selectively removed by a photolithography process including exposure and development processes using a third mask, to form a third photoresist pattern 25a exposing part of the drain electrode 19b. 
Subsequently, the passivation layer 23 is selectively etched by using the third photoresist pattern 25a as a mask, to form a contact hole 27 exposing the drain electrode 19b. 
Next, referring to FIG. 2H, after removing the third photoresist pattern 25a, a transparent material, made of ITO or other transparent substance, connected to the drain electrode 19b is deposited on the passivation layer 23 including the contact hole 27.
Subsequently, a fourth photoresist film (not shown) is coated on the transparent material layer, and selectively removed by a photolithography process including exposure and development processes using a fourth mask, to form a fourth photoresist pattern (not shown).
Next, the transparent material layer (not shown) is selectively removed using the fourth photoresist pattern (not shown) as a mask, to form a pixel electrode 29 and then remove the fourth photoresist pattern.
Subsequently, referring to FIG. 2I, a black matrix 43 and a color filter layer 45 are sequentially deposited on a second substrate 41, and then an overcoat layer is formed on the color filter layer 45, or a common electrode 47 is formed thereon according to the alignment mode.
Next, the second substrate 41 and the first substrate 11 are bonded together, and then a liquid crystal layer 51 is formed between the second substrate 41 and the first substrate 11, thus completing the fabrication of the liquid crystal display device.
The thin film transistor fabricated in the order of the processes as described above is manufactured by a four mask process, including a first mask process in the formation of a gate electrode, a second mask process in the formation of an active pattern and source/drain electrodes, a third mask in the formation of a contact hole exposing the drain electrode, and a fourth mask process in the formation of a pixel electrode.
However, in a case where a diffraction exposure is carried out in order to simultaneously pattern the source/drain electrodes and the active layer, as shown in FIG. 2E, the active pattern may be formed wider than the line width of the source/drain electrodes, and this protruded portion may cause signal distortion. In particular, when a burst inverter method is used, the photocurrent of the active layer is formed when the burst inverter is performed at a predetermined cycle, and the photocurrent causes an interference effect with the metal (outermost common electrode) of adjacent portions, thus causing the signal distortion.